MT41K256M16 – 32 Meg x 16 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K1G4 – 128 Meg x 4 x 8 banks 是低電壓版本,相比1.5v DDR3 SDRAM 而言,其電壓為1.35v,其他各方面參數(shù)完全符合DDR3 SDRAM的相關(guān)規(guī)范。QQ:1762516767 18675554078,原裝現(xiàn)貨,歡迎交流。(更多詳情)
MT41K256M16 MT41K512M8 MT41K1G4的主要功能特性包括以下:
? VDD = VDDQ = 1.35V (1.283–1.45V)
? Backward compatible to VDD = VDDQ = 1.5V ±0.075V – Supports DDR3L devices to be backward compatible in 1.5V applications
? Differential bidirectional data strobe
? 8n-bit prefetch architecture
? Differential clock inputs (CK, CK#)
? 8 internal banks
? Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
? Programmable CAS (READ) latency (CL)
? Programmable posted CAS additive latency (AL)
? Programmable CAS (WRITE) latency (CWL)
? Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
? Selectable BC4 or BL8 on-the-fly (OTF)
? Self refresh mode
? TC of 0°C to +95°C
– 64ms, 8192-cycle refresh at 0°C to +85°C
– 32ms at +85°C to +95°C
? Self refresh temperature (SRT)
? Automatic self refresh (ASR)
? Write leveling
? Multipurpose register
? Output driver calibration
MT41K256M16 MT41K512M8 MT41K1G4的管腳圖如下:
MT41K256M16 MT41K512M8 MT41K1G4的采購信息如下,較常用的型號如MT41K256M16HA-125:E。
(以上信息由深圳市桑尼奇科技有限公司提供)
評論列表: